1. Technical Field
The present invention relates to a silicon carbide semiconductor device using a wide band gap substrate and a method of manufacturing the same.
2. Related Art
In the conventional art, power semiconductor devices designed to control high voltage and current is made of silicon (Si). There are a plurality of types of power semiconductor devices, such as bipolar transistors, insulated gate bipolar transistors (IGBTs) and insulated gate field effect transistors (MOSFETs), which are used in different and suitable applications.
For example, bipolar transistors and IGBTs exhibit higher current density and can deal with higher current than MOSFETs, but cannot realize high-speed switching. Specifically speaking, in use, the limit of the switching frequency is approximately several kilohertz for the bipolar transistors and approximately several dozen kilohertz for the IGBTs. On the other hand, the power MOSFETs exhibit lower current density than the bipolar transistors and IGBTs and have difficulties in dealing with high current, but can realize high-speed switching of up to approximately several megahertz.
The market strongly demands power semiconductor devices that can operate with both high current and high speed. To fulfill the demand, a lot of efforts have been made to improve the IGBTs and power MOSFETs. At present, the IGBTs and power MOSFETs have been thoroughly developed to almost reach the performance limit of silicon. Among such efforts, silicon carbide (SiC) is the semiconductor material that has been attracting attention as it can be used to fabricate (manufacture) next-generation power semiconductor devices that exhibit low on-voltage, excellent high-speed characteristics and favorable high-temperature characteristics (see, for example, K. Shenai et al., Optimum Semiconductors For High-Power Electronics, IEEE Transactions on Electron Devices, September 1989, Vol. 36, No. 9, p. 1811-1823).
Silicon carbide is a chemically very stable semiconductor material. Having a wide band gap of 3 eV, silicon carbide can be utilized very stably as a semiconductor even at high temperatures. Furthermore, since the maximum electric field intensity of silicon carbide is by one or more orders of magnitude higher than that of silicon, silicon carbide is expected to be used as a semiconductor material that can realize both high breakdown voltage and low on-resistance. The above-described features of silicon carbide are also possessed by semiconductors having a wide band gap (hereinafter, referred to as the wide band gap semiconductors), for example, gallium nitride (GaN). Some semiconductor devices have been disclosed that use such wide band gap semiconductors in order to realize higher breakdown voltage (see, for example, B. Jayant Baliga, Silicon Carbide Power Devices, United States of America, WorldScientific Publishing Co., Mar. 30, 2006, p. 61).
In a high breakdown voltage semiconductor device, a high voltage is applied not only to the active region in which the element structure is formed but also to the edge termination structure that surrounds the active region and is designed to maintain the breakdown voltage. As a result, the electric fields concentrate in the edge termination structure. The breakdown voltage of the high breakdown voltage semiconductor device is determined by the impurity concentration, the thickness and the electric field intensity of the semiconductor. The tolerance to breakdown determined in the above manner by the unique features of the semiconductor is equal between the active region and the edge termination structure. Therefore, if the electric fields concentrate in the edge termination structure, the electric load imposed on the edge termination structure may exceed the tolerance to breakdown, which may possibly cause the edge termination structure to break down.
Some disclosed high breakdown voltage semiconductor devices achieve enhanced breakdown voltage by relaxing or diffusing the electric fields in the edge termination structure. Such semiconductor devices include a termination structure such as junction termination extension (JTE) structure and a floating field limiting ring (FLR) structure formed in the edge termination structure. Also, a disclosed semiconductor device has achieved improved reliability by arranging a floating metal electrode that is adjacent to the FLR as a field plate (FP) in order to cause the electric charges generated in the edge termination structure to be released (see, for example, Japanese Patent Application Publications Nos. 2010-50147 and 2006-165225).
FIG. 22 is a cross-sectional view showing the main constituents of a conventional silicon carbide semiconductor device 200. The silicon carbide semiconductor device 200 is, for example, an N-channel MOSFET, which is a switching device. In the following description, silicon carbide may be referred to as SiC.
The silicon carbide semiconductor device 200 includes a n-type SiC layer 52 on the front surface of an n-type SiC substrate 51, a plurality of p-type regions 60 on the front surface side of the n-type SiC layer 52, and a p-type SiC layer 61 arranged on the p-type regions 60. The silicon carbide semiconductor device 200 further includes an n-type region 62, which serves as a junction field effect transistor (JFET) region, arranged in the p-type SiC layer 61 so as to be positioned on a portion of the n-type SiC layer 52 in which the p-type region 60 is not formed, and an n-type source region 54 and a p-type contact region 55 in the p-type SiC layer 61. The silicon carbide semiconductor device 200 includes a source electrode 58 on the front surfaces of the n-type source region 54 and the p-type contact region 55.
The silicon carbide semiconductor device 200 also includes a gate electrode 57 arranged on the front surface of a portion of the p-type SiC layer 61 that is sandwiched between the n-type source region 54 and the n-type region 62 with a gate insulator 56 placed between the gate electrode 57 and the front surface of the p-type SiC layer 61, and a drain electrode 59 arranged on the back surface of the n-type SiC substrate 51.
In the above-described silicon carbide semiconductor device 200, if a voltage equal to or lower than the gate threshold is applied to the gate electrode 57 while a positive voltage with respect to the source electrode 58 is being applied to the drain electrode 59, the p-n junction between the p-type region 60 and the n-type SiC layer 52 or between the p-type SiC layer 61 and the n-type region 62 is reverse-biased. Thus, breakdown does not occur in the active region 201 and no currents flow.
On the other hand, if a voltage equal to or higher than the gate threshold is applied to the gate electrode 57, an inversion layer (an n channel) is formed on the front surface of the p-type SiC layer 61 immediately below the gate electrode 57 and currents resultantly flow. In this manner, the silicon carbide semiconductor device 200 can operate as a switch based on the level of the voltage applied to the gate electrode 57.
In the edge termination structure 202 of the silicon carbide semiconductor device 200, the substrate is thinner due to the removal of the peripheral portion of the p-type SiC layer 61. P-type regions 81, 82 are provided in the thinner portion of the substrate. When a high voltage is applied, the horizontal high voltage is maintained at the bonding portion between the p-type regions 81, 82 and the n-type SiC layer 52 in the region excluding the active region 201. The edge termination structure 202 is positioned outside a step-like portion 90.
In the silicon carbide semiconductor device 200 shown in FIG. 22, however, if a high voltage is applied to the drain electrode 59 under such a condition that the p-type region 60 has a lower impurity concentration than the p-type regions 81, 82, the electric fields are unequally shared between the p-type regions 81, 82 and the p-type region 60, which sandwich the step-like portion 90 therebetween. This may resultantly lower the breakdown voltage in the step-like portion 90. The breakdown voltage is also lowered by the shape of the step-like portion 90 created by the etching of the p-type SiC layer 61 and the varying impurity concentrations in the front surfaces of the p-type regions 81, 82.
In addition, if the bottom surfaces of the p-type regions 81, 82 are located deeper than the bottom surface of the p-type region 60 as shown in FIG. 22, a portion of the n-type SiC layer 52 that is positioned under the p-type regions 81, 82 has a small thickness. Accordingly, the p-type regions 81, 82 are highly likely to experience avalanche and the edge termination structure 202 thus exhibits a lower breakdown voltage than the active region 201. Furthermore, since the edge termination structure 202 has a smaller area than the active region 201, the avalanche generates excessively high current density and easily causes avalanche breakdown in the edge termination structure 202.
It is speculated that the structures disclosed in Patent Documents 1 and 2 are likely to experience avalanche and resultantly breakdown voltage degradation not in the active region but in the edge termination structure, which includes the step-like portion, due to the narrow width of the n-type drift layer under the step-like portion.
The object of the present invention is to solve the above-described problems and to provide a silicon carbide semiconductor device that is capable of preventing breakdown voltage degradation in the edge termination structure and a method of manufacturing the same.